The present invention relates to a synchronization method for a receiving unit and a receiving unit corresponding to the synchronization method. Cyclically emitted synchronization signals are transmitted to the receiving unit from a transmitting unit. The receiving unit feeds the synchronization signals to a phase shifter of a phase-locked loop that has a clock-pulse generator. The clock-pulse generator emits a number of clock signals between two synchronization signals. The phase shifter, upon reception of the synchronization signals, detects instantaneous phase errors and readjusts the clock-pulse generator so that the clock-pulse generator emits a desired number of clock signals between two synchronization signals.
Conventional synchronization methods of this type and corresponding receiving units are used, inter alia, in field bus systems, e.g., the PROFIBUS.
Field bus systems are distributed control systems, which as a rule have one transmitting unit (top-assembly group, bus master) and a multiplicity of receiving units (slaves). The individual slave assemblies, as a rule, are driven as a result of the transmitting unit transmitting a command telegram to the receiving units. Upon receiving the command telegram, the receiving units output setpoint values to a controlled technical system, the setpoint values having been transmitted previously to them by the transmitting unit. At the same time, the receiving units read in the actual values from the controlled technical system, which they subsequently transmit to the transmitting unit. The transmitting unit then calculates new setpoint values, which it transmits to the individual receiving units, so that they are ready for the next command telegram.
The command telegrams are transmitted from the transmitting unit so as to be equidistant in time. Therefore, from the command telegrams, it is possible to derive synchronization signals, which are used to synchronize the receiving units to the transmitting unit.
In practice, between the transmission of the read-in actual values to the transmitting unit and the transmission of the setpoint values to the receiving units, and the transmission of the next command telegram, there remains a quantity of free time. The latter, as a rule, is used for so-called acyclical telegrams. In this context, due to the delays caused by the acyclical telegrams, individual command telegrams may be delayed in being transmitted. The reception of command telegrams that have been delayed in their transmission causes a defective post-synchronization of the receiving units. In many applications, this defective post-synchronization is not critical. However, in time-critical applications, in particular in the case of the clutch of interpolating drive axles, a defective post-synchronization of this type cannot be tolerated.
An objective of the present invention is to create a synchronization method for a receiving unit, by which the receiving unit may be precisely synchronized to the transmitting unit.
The objective is achieved by the fact that the phase shifter integrates the instantaneous phase errors into an integration value and the integration value is adjusted to an integration fraction, which is smaller than one.
If the phase shifter adjusts the instantaneous phase errors to a proportional fraction, which is smaller than one, the result is a more rapid adjustment of the phase error. This is especially true when the proportional fraction is larger than the integration fraction.
If the phase shifter adjusts the clock-pulse generator only when the absolute value of the instantaneous phase error does not exceed a maximal error, then delays of the synchronization signals caused by acyclical telegrams do not result in any defective readjustment of the clock-pulse generator.
If, when the maximal error is exceeded, a counter is counted up (increased), then, in particular, a long-lasting error in the communication between the transmitting unit in the receiving unit can be recognized.
If a validity signal is transmitted to the phase-locked loop by a control unit and the synchronization method is carried out only if the validity signal is present, then it can be ensured that the synchronization results from the correct synchronization signals.
If, within the clock-pulse generator, a clock generator generates primary clock signals that are fed to a frequency divider, which outputs the divided primary clock signals as clock signals on the output side, it is assured that all of the components arranged between the clock generator and the frequency divider are also synchronized in phase.
If, before the detection of the first instantaneous phase error, the clock-pulse generator outputs the desired number of clock signals, the process is thereupon stopped, and it is started once again upon reception of the next synchronization signal, then there results a particularly rapid synchronization of the receiving unit during start-up.
If, upon reception of the first synchronization signal after the re-start-up of the clock-pulse generator, the instantaneous phase error is at least substantially corrected and the integration of the instantaneous phase errors and the correction of the integration value, possibly including the correction of the instantaneous phase error, are carried out only upon reception of the second synchronization signal, then the synchronization is further accelerated at the beginning of the process.